Nanowires and nanosheets are relatively thin wires or sheets, for example, with dimensions measured in nanometers (nm). Nanowires are circular or square shaped or approximately circular or square shaped in cross-section and have diameters or widths such as, for example, less than about 5 nm or 10 nm. A nanowire typically has a width that is equal or substantially equal to its height. Nanosheets are elliptical or rectangular shaped, or approximately elliptical or rectangular shaped in cross section and have thicknesses or heights such as, for example, less than about 5 nm or 10 nm. The width of a nanosheet may be considerably larger than this height, such as about 20 nm to about 60 nm in the case of a nanosheet which is about 4 nm to about 8 nm in height. The thickness of a nanosheet layer, or height of the rectangle in cross section, affects the electrostatics of the nanosheet.
Nanowire and nanosheet devices can be viable device options instead of fin field-effect transistors (FinFETs). For example, nanowires or nanosheets can be used as the fin structure in a dual-gate, tri-gate or gate-all-around (GAA) FET device. Complementary metal-oxide semiconductor (CMOS) scaling can be enabled by the use of stacked nanowires and nanosheets, which offer superior electrostatics and higher current density per footprint area than FinFETs. Three-dimensional (3D) integration by stacking N and PMOSFETs is a viable approach for 3 nm node and beyond for area scaling. In addition to area scaling, stacking combined with nanosheet or nanowire technology can provide beneficial device electrostatics control. Nanowire current density per footprint is less than that of nanosheets because current is proportional to the perimeter of the wire or sheet. Nanowires may have slightly better electrostatics than nanosheets, while nanosheets may exhibit higher current per footprint and less parasitic capacitance than nanowires.